Example
of Instruction Scheduling for the Itanium® 2 Processor
Click the Start button below to see a comparison of assembly code
for the Itanium® processor and the Itanium 2 processor.
Memcpyu.c (Variable shift)
s1 = ( *s.l++ >> s_off_bits );
d1 = ( (*d.l << (64-d_off_bits)) >> (64-d_off_bits) );
t = s1 << d_off_bits | d1;
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