Integer Shift Operations for Streaming SIMD Extensions 2

The shift-operation intrinsics for Streaming SIMD Extensions 2 and the description for each are listed in the following table.

The prototypes for Streaming SIMD Extensions 2 intrinsics are in the emmintrin.h header file.

Intrinsic Shift
Direction
Shift
Type
Corresponding
Instruction
_mm_slli_si128 Left Logical PSLLDQ
_mm_slli_epi16 Left Logical PSLLW
_mm_sll_epi16 Left Logical PSLLW
_mm_slli_epi32 Left Logical PSLLD
_mm_sll_epi32 Left Logical PSLLD
_mm_slli_epi64 Left Logical PSLLQ
_mm_sll_epi64 Left Logical PSLLQ
_mm_srai_epi16 Right Arithmetic PSRAW
_mm_sra_epi16 Right Arithmetic PSRAW
_mm_srai_epi32 Right Arithmetic PSRAD
_mm_sra_epi32 Right Arithmetic PSRAD
_mm_srli_si128 Right Logical PSRLDQ
_mm_srli_epi16 Right Logical PSRLW
_mm_srl_epi16 Right Logical PSRLW
_mm_srli_epi32 Right Logical PSRLD
_mm_srl_epi32 Right Logical PSRLD
_mm_srli_epi64 Right Logical PSRLQ
_mm_srl_epi64 Right Logical PSRLQ

__m128i _mm_slli_si128(__m128i a, int imm)

Shifts the 128-bit value in a left by imm bytes while shifting in zeros. imm must be an immediate.
r := a << (imm * 8)

__m128i _mm_slli_epi16(__m128i a, int count)

Shifts the 8 signed or unsigned 16-bit integers in a left by count bits while shifting in zeros.
r0 := a0 << count
r1 := a1 << count
...
r7 := a7 << count

__m128i _mm_sll_epi16(__m128i a, __m128i count)

Shifts the 8 signed or unsigned 16-bit integers in a left by count bits while shifting in zeros.
r0 := a0 << count
r1 := a1 << count
...
r7 := a7 << count

__m128i _mm_slli_epi32(__m128i a, int count)

Shifts the 4 signed or unsigned 32-bit integers in a left by count bits while shifting in zeros.
r0 := a0 << count
r1 := a1 << count
r2 := a2 << count
r3 := a3 << count

__m128i _mm_sll_epi32(__m128i a, __m128i count)

Shifts the 4 signed or unsigned 32-bit integers in a left by count bits while shifting in zeros.
r0 := a0 << count
r1 := a1 << count
r2 := a2 << count
r3 := a3 << count

__m128i _mm_slli_epi64(__m128i a, int count)

Shifts the 2 signed or unsigned 64-bit integers in a left by count bits while shifting in zeros.
r0 := a0 << count
r1 := a1 << count

__m128i _mm_sll_epi64(__m128i a, __m128i count)

Shifts the 2 signed or unsigned 64-bit integers in a left by count bits while shifting in zeros.
r0 := a0 << count
r1 := a1 << count

__m128i _mm_srai_epi16(__m128i a, int count)

Shifts the 8 signed 16-bit integers in a right by count bits while shifting in the sign bit.
r0 := a0 >> count
r1 := a1 >> count
...
r7 := a7 >> count

__m128i _mm_sra_epi16(__m128i a, __m128i count)

Shifts the 8 signed 16-bit integers in a right by count bits while shifting in the sign bit.
r0 := a0 >> count
r1 := a1 >> count
...
r7 := a7 >> count

__m128i _mm_srai_epi32(__m128i a, int count)

Shifts the 4 signed 32-bit integers in a right by count bits while shifting in the sign bit.
r0 := a0 >> count
r1 := a1 >> count
r2 := a2 >> count
r3 := a3 >> count

__m128i _mm_sra_epi32(__m128i a, __m128i count)

Shifts the 4 signed 32-bit integers in a right by count bits while shifting in the sign bit.
r0 := a0 >> count
r1 := a1 >> count
r2 := a2 >> count
r3 := i3 >> count

__m128i _mm_srli_si128(__m128i a, int imm)

Shifts the 128-bit value in a right by imm bytes while shifting in zeros. imm must be an immediate.
r := srl(a, imm*8)

__m128i _mm_srli_epi16(__m128i a, int count)

Shifts the 8 signed or unsigned 16-bit integers in a right by count bits while shifting in zeros.
r0 := srl(a0, count)
r1 := srl(a1, count)
...
r7 := srl(a7, count)

__m128i _mm_srl_epi16(__m128i a, __m128i count)

Shifts the 8 signed or unsigned 16-bit integers in a right by count bits while shifting in zeros.
r0 := srl(a0, count)
r1 := srl(a1, count)
...
r7 := srl(a7, count)

__m128i _mm_srli_epi32(__m128i a, int count)

Shifts the 4 signed or unsigned 32-bit integers in a right by count bits while shifting in zeros.
r0 := srl(a0, count)
r1 := srl(a1, count)
r2 := srl(a2, count)
r3 := srl(a3, count)

__m128i _mm_srl_epi32(__m128i a, __m128i count)

Shifts the 4 signed or unsigned 32-bit integers in a right by count bits while shifting in zeros.
r0 := srl(a0, count)
r1 := srl(a1, count)
r2 := srl(a2, count)
r3 := srl(a3, count)

__m128i _mm_srli_epi64(__m128i a, int count)

Shifts the 2 signed or unsigned 64-bit integers in a right by count bits while shifting in zeros.
r0 := srl(a0, count)
r1 := srl(a1, count)

__m128i _mm_srl_epi64(__m128i a, __m128i count)

Shifts the 2 signed or unsigned 64-bit integers in a right by count bits while shifting in zeros.
r0 := srl(a0, count)
r1 := srl(a1, count)