Each conversion intrinsic takes one data type and performs a conversion to a different type. Some conversions such as _mm_cvtpd_ps result in a loss of precision. The rounding mode used in such cases is determined by the value in the MXCSR register. The default rounding mode is round-to-nearest. Note that the rounding mode used by the C and C++ languages when performing a type conversion is to truncate. The _mm_cvttpd_epi32 and _mm_cvttsd_si32 intrinsics use the truncate rounding mode regardless of the mode specified by the MXCSR register.
The conversion-operation intrinsics for Streaming SIMD Extensions 2 are listed in the following table followed by detailed descriptions.
The prototypes for Streaming SIMD Extensions 2 intrinsics are in the emmintrin.h header file.
| Intrinsic Name |
Corresponding Instruction |
Return Type |
Parameters |
|---|---|---|---|
| _mm_cvtpd_ps | CVTPD2PS | __m128 | (__m128d a) |
| _mm_cvtps_pd | CVTPS2PD | __m128d | (__m128 a) |
| _mm_cvtepi32_pd | CVTDQ2PD | __m128d | (__m128i a) |
| _mm_cvtpd_epi32 | CVTPD2DQ | __m128i | (__m128d a) |
| _mm_cvtsd_si32 | CVTSD2SI | int | (__m128d a) |
| _mm_cvtsd_ss | CVTSD2SS | __m128 | (__m128 a, __m128d b) |
| _mm_cvtsi32_sd | CVTSI2SD | __m128d | (__m128d a, int b) |
| _mm_cvtss_sd | CVTSS2SD | __m128d | (__m128d a, __m128 b) |
| _mm_cvttpd_epi32 | CVTTPD2DQ | __m128i | (__m128d a) |
| _mm_cvttsd_si32 | CVTTSD2SI | int | (__m128d a) |
| _mm_cvtpd_pi32 | CVTPD2PI | __m64 | (__m128d a) |
| _mm_cvttpd_pi32 | CVTTPD2PI | __m64 | (__m128d a) |
| _mm_cvtpi32_pd | CVTPI2PD | __m128d | (__m64 a) |
| _mm_cvtsd_f64 | None | double | (__m128d a) |
__m128 _mm_cvtpd_ps(__m128d a)
__m128d _mm_cvtps_pd(__m128 a)Converts the two DP FP values of a to SP FP values.
r0 := (float) a0
r1 := (float) a1
r2 := 0.0 ; r3 := 0.0
__m128d _mm_cvtepi32_pd(__m128i a)Converts the lower two SP FP values of a to DP FP values.
r0 := (double) a0
r1 := (double) a1
__m128i _mm_cvtpd_epi32(__m128d a)Converts the lower two signed 32-bit integer values of a to DP FP values.
r0 := (double) a0
r1 := (double) a1
int _mm_cvtsd_si32(__m128d a)Converts the two DP FP values of a to 32-bit signed integer values.
r0 := (int) a0
r1 := (int) a1
r2 := 0x0 ; r3 := 0x0
__m128 _mm_cvtsd_ss(__m128 a, __m128d b)Converts the lower DP FP value of a to a 32-bit signed integer value.
r := (int) a0
__m128d _mm_cvtsi32_sd(__m128d a, int b)Converts the lower DP FP value of b to an SP FP value. The upper SP FP values in a are passed through.
r0 := (float) b0
r1 := a1; r2 := a2 ; r3 := a3
__m128d _mm_cvtss_sd(__m128d a, __m128 b)Converts the signed integer value in b to a DP FP value. The upper DP FP value in a is passed through.
r0 := (double) b
r1 := a1
__m128i _mm_cvttpd_epi32(__m128d a)Converts the lower SP FP value of b to a DP FP value. The upper value DP FP value in a is passed through.
r0 := (double) b0
r1 := a1
Converts the two DP FP values of a to 32-bit signed integers using truncate.
r0 := (int) a0
r1 := (int) a1
r2 := 0x0 ; r3 := 0x0
int _mm_cvttsd_si32(__m128d a)
__m64 _mm_cvtpd_pi32(__m128d a)Converts the lower DP FP value of a to a 32-bit signed integer using truncate.
r := (int) a0
__m64 _mm_cvttpd_pi32(__m128d a)Converts the two DP FP values of a to 32-bit signed integer values.
r0 := (int) a0
r1 := (int) a1
__m128d _mm_cvtpi32_pd(__m64 a)Converts the two DP FP values of a to 32-bit signed integer values using truncate.
r0 := (int) a0
r1 := (int) a1
_mm_cvtsd_f64(__m128d a)Converts the two 32-bit signed integer values of a to DP FP values.
r0 := (double) a0
r1 := (double) a1
This intrinsic extracts a double precision floating point value from the first vector element of an __m128d. It does so in the most effecient manner possible in the context used. This intrinsic does not map to any specific SSE2 instruction.